丝印代码：74HC373D；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Octal D-Type Latch with 3-State Outputs General The 74HC373D is a high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power diss

Octal D-type transparent latch; 3-state

Octal D-type transparent latch; 3-state

1. General description The 74HC373; 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will

74HC CMOS logic IC series

Function：Octal D-Type Latch (3-State)\nNumber of Circuits：8\nRoHS Compatible Product(s) (#)：Available\nAssembly bases：日本 Power Dissipation PD 500 mW ;

Octal D-type transparent latch; 3-state

The 74HC373; 74HCT373 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresp • Input levels:• For 74HC373: CMOS level\n• For 74HCT373: TTL level\n\n• 3-state non-inverting outputs for bus oriented applications\n• Common 3-state output enable input\n• Functionally identical to the 74HC563; 74HCT563 and 74HC573; 74HCT573\n• Complies with JEDEC standard no. 7 A\n• ESD protectio;

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC LATCH OCTAL D 3ST 20SOIC 集成电路（IC） 锁存器

Octal D-type transparent latch; 3-state

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Octal D-type transparent latch; 3-state

Octal D-type transparent latch; 3-state

The 74HC373-Q100; 74HCT373-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A.\n The 74HC373-Q100; 74HCT373-Q100 is an octal D-type transparent latch featuring separate D-type inputs for each latch a • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC373-Q100: CMOS level\n• For 74HCT373-Q100: TTL level\n\n• 3-state non-inverting outputs for bus-oriented applications\n• Common 3-state out;

Octal D-type transparent latch; 3-state

1. General description The 74HC373-Q100; 74HCT373-Q100 is an octal D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch ou

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC LATCH TRANSP OCT D 3ST 20SOIC 集成电路（IC） 锁存器

Octal D-type transparent latch; 3-state

文件：56.85 Kbytes Page：8 Pages

Octal D-type transparent latch; 3-state

Octal 3?뭆tate Non?묲nverting Transparent Latch

文件：129.88 Kbytes Page：9 Pages

Octal D-type transparent latch; 3-state

文件：56.85 Kbytes Page：8 Pages

Octal D-type transparent latch; 3-state

文件：56.85 Kbytes Page：8 Pages

Octal 3-State Non-Inverting Transparent Latch

Octal 3-State Non-Inverting Transparent Latch High–Performance Silicon–Gate CMOS The MC74HC373A is identical in pinout to the LS373. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC373A is the non–invert

Octal 3-State Non-Inverting Transparent Latch

Octal 3-State Non-Inverting Transparent Latch High–Performance Silicon–Gate CMOS The MC74HC373A is identical in pinout to the LS373. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC373A is the non–invert

Octal 3-State Non-Inverting Transparent Latch

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