4-bit bidirectional universal shift register

GENERAL DESCRIPTION The 74HC/HCT194 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The functional characteristics of the 74HC/HCT194 4-bit bidirectional universal shift registers are ind

4-bit bidirectional universal shift gister

4-bit bidirectional universal shift register

1. General description The 74HC194 is a 4-bit bidirectional universal shift register. The synchronous operation of the device is determined by the mode select inputs (S0, S1). In parallel load mode (S0 and S1 HIGH) data appearing on the D0 to D3 inputs, when S0 and S1 are HIGH, is transferred t

4-bit bidirectional universal shift register

GENERAL DESCRIPTION The 74HC/HCT194 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The functional characteristics of the 74HC/HCT194 4-bit bidirectional universal shift registers are ind

4-bit bidirectional universal shift register

The 74HC194 is a 4-bit bidirectional universal shift register. The synchronous operation of the device is determined by the mode select inputs (S0, S1). In parallel load mode (S0 and S1 HIGH) data appearing on the D0 to D3 inputs, when S0 and S1 are HIGH, is transferred to the Q0 to Q3 outputs. When • Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC194: CMOS level\n\n• Shift-left and shift-right capability\n• Synchronous parallel and serial data transfer\n• Easily expanded for both serial and parallel operation\n• Asynchronous master reset\n• Hold ('do nothing') mode\n• ESD protec;

4-bit bidirectional universal shift register

The 74HC194 is a 4-bit bidirectional universal shift register. The synchronous operation of the device is determined by the mode select inputs (S0, S1). In parallel load mode (S0 and S1 HIGH) data appearing on the D0 to D3 inputs, when S0 and S1 are HIGH, is transferred to the Q0 to Q3 outputs. When • Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC194: CMOS level\n\n• Shift-left and shift-right capability\n• Synchronous parallel and serial data transfer\n• Easily expanded for both serial and parallel operation\n• Asynchronous master reset\n• Hold ('do nothing') mode\n• ESD protec;

4-bit bidirectional universal shift register

1. General description The 74HC194 is a 4-bit bidirectional universal shift register. The synchronous operation of the device is determined by the mode select inputs (S0, S1). In parallel load mode (S0 and S1 HIGH) data appearing on the D0 to D3 inputs, when S0 and S1 are HIGH, is transferred t

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：通用 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC 4BIT BI-DIR SHIFT REG 16SOIC 集成电路（IC） 移位寄存器

封装/外壳：16-SSOP（0.209"，5.30mm 宽） 功能：通用 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC 4BIT BI-DIR SHIFT REG 16-SSOP 集成电路（IC） 移位寄存器

High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register

文件：554.09 Kbytes Page：19 Pages

4-bit Bidirectional Universal Shift Register

Description This bidirectional shift register is designed to incorporate virtually all of the features a system designer may want in a shift register. It features parallel inputs, parallel outputs, right shift and left shift serial inputs, operating mode control inputs, and a direct overriding cl

High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register

文件：47.85 Kbytes Page：8 Pages

High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register

文件：47.85 Kbytes Page：8 Pages

High-Speed CMOS Logic 4-Bit Bidirectional Universal Shift Register

文件：47.85 Kbytes Page：8 Pages