Quad D-type flip-flop with reset; positive-edge trigger

GENERAL DESCRIPTION The 74HC/HCT175 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT175 have four edge-triggered, D-type flip-flops with individual D inputs and both Q and Q o

封装/外壳：16-DIP（0.300"，7.62mm） 功能：主复位 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 4BIT 16DIP 集成电路（IC） 触发器

Quad D Flip-Flop with Common Clock and Reset

Quad D Flip−Flop with Common Clock and Reset High–Performance Silicon–Gate CMOS The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Output Drive Capability:

Quad D Flip-Flop with Common Clock and Reset

Quad D Flip−Flop with Common Clock and Reset High–Performance Silicon–Gate CMOS The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Output Drive Capability:

Quad D Flip-Flop with Common Clock and Reset

Quad D Flip−Flop with Common Clock and Reset High–Performance Silicon–Gate CMOS The MC74HC175A is identical in pinout to the LS175. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. • Output Drive Capability:

Quad D Flip-Flop with Common Clock and Reset

文件：200.41 Kbytes Page：7 Pages

Quad D Flip-Flop with Common Clock and Reset

文件：200.41 Kbytes Page：7 Pages