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Quad 3-State Noninverting Buffers

The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A noninverting buffers are designed to be used with 3–state memory address

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Quad 3-State Noninverting Buffers

Quad 3−State Noninverting Buffers High−Performance Silicon−Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A n

ONSEMI

安森美半导体

Quad 3-State Noninverting Buffers

Quad 3−State Noninverting Buffers High−Performance Silicon−Gate CMOS The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC125A and HC126A n

ONSEMI

安森美半导体

Quad 3-State Noninverting Buffers

文件:113.41 Kbytes Page:7 Pages

ONSEMI

安森美半导体

Quad 3-State Noninverting Buffers

文件:113.41 Kbytes Page:7 Pages

ONSEMI

安森美半导体

更新时间:2025-12-29 10:34:01
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