丝印：74HC123D；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Dual Monostable Multivibrator General The 74HC123D is a high speed CMOS MONOSTABLE MULTIVIBRATOR fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. There a

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long

Dual retriggerable monostable multivibrator with reset

1. General description The 74HC123; 74HCT123 is a dual retriggerable monostable multivibrator with reset. The basic output pulse width is programmed by selection of external components (REXT and CEXT). Once triggered this basic pulse width may be extended by retriggering either of the edge trig

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC MULTIVIBRATOR 40NS 16SOIC 集成电路（IC） 多谐振荡器

Dual retriggerable monostable multivibrator with reset

74HC CMOS logic IC series

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long

Dual retriggerable monostable multivibrator with reset

1. General description The 74HC123-Q100; 74HCT123-Q100 is a dual retriggerable monostable multivibrator with reset. The basic output pulse width is programmed by selection of external components (REXT and CEXT). Once triggered this basic pulse width may be extended by retriggering either of the

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC MULTIVIBRATOR 65NS 16SO 集成电路（IC） 多谐振荡器

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

文件：846.49 Kbytes Page：23 Pages

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

1. General description The 74HC123; 74HCT123 is a dual retriggerable monostable multivibrator with reset. The basic output pulse width is programmed by selection of external components (REXT and CEXT). Once triggered this basic pulse width may be extended by retriggering either of the edge trig

Dual retriggerable monostable multivibrator with reset

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long

Dual retriggerable monostable multivibrator with reset

GENERAL DESCRIPTION The 74HC/HCT123 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • DC triggered from active HIGH or active LOW inputs • Retriggerable for very long

High Speed CMOS Logic

文件：610.48 Kbytes Page：7 Pages