9-Bit D-Type Flip-Flop

General Description The 74F823 is a 9-bit buffered register. It features Clock Enable and Clear which are ideal for parity bus interfacing in high performance microprogramming systems. Features ■ 3-STATE outputs ■ Clock Enable and Clear

Bus interface registers

DESCRIPTION The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. FEATURES • High speed parallel registers with positive edge-triggered D-t

9-Bit D-Type Flip-Flop

文件：62.2 Kbytes Page：6 Pages

9-Bit D-Type Flip-Flop

文件：158.08 Kbytes Page：8 Pages

9-Bit D-Type Flip-Flop

9-Bit D-Type Flip-Flop

General Description The 74F823 is a 9-bit buffered register. It features Clock Enable and Clear which are ideal for parity bus interfacing in high performance microprogramming systems. Features ■ 3-STATE outputs ■ Clock Enable and Clear

9-Bit D-Type Flip-Flop

General Description The 74F823 is a 9-bit buffered register. It features Clock Enable and Clear which are ideal for parity bus interfacing in high performance microprogramming systems. Features ■ 3-STATE outputs ■ Clock Enable and Clear

9-Bit D-Type Flip-Flop

文件：62.2 Kbytes Page：6 Pages

9-Bit D-Type Flip-Flop

文件：62.2 Kbytes Page：6 Pages

9-Bit D-Type Flip-Flop

文件：158.08 Kbytes Page：8 Pages

封装/外壳：24-SOIC（0.295"，7.50mm 宽） 功能：主复位 包装：管件 描述：IC FF D-TYPE SNGL 9BIT 24SOP 集成电路（IC） 触发器

封装/外壳：24-DIP（0.300"，7.62mm） 功能：主复位 包装：袋 描述：IC FF D-TYPE SNGL 9BIT 24DIP 集成电路（IC） 触发器

9-Bit D-Type Flip-Flop

文件：62.2 Kbytes Page：6 Pages

9-Bit D-Type Flip-Flop

文件：158.08 Kbytes Page：8 Pages

Bus interface registers

DESCRIPTION The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity. FEATURES • High speed parallel registers with positive edge-triggered D-t