Octal Transceiver/Register with 3-STATE Outputs

General Description These devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the a

Octal Transceiver/Register with TRI-STATE Outputs

文件：216.07 Kbytes Page：12 Pages

封装/外壳：24-DIP（0.300"，7.62mm） 包装：管件 描述：IC TXRX NON-INVERT 5.5V 24DIP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Octal Transceiver/Register with 3-STATE Outputs

General Description These devices consist of bus transceiver circuits with 3-STATE, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus will be clocked into the registers as the a

Octal transceiver/register, non-inverting 3-State

DESCRIPTION The 74F646/74F646A and 74F648/74F648A transceivers/registers consist of bus transceiver circuits with 3–state outputs, D–type flip–flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus

Octal Transceiver/Register with TRI-STATE Outputs

文件：216.07 Kbytes Page：12 Pages

Octal Transceiver/Register with 3-STATE Outputs

文件：71.76 Kbytes Page：6 Pages

Octal Transceiver/Register with TRI-STATE Outputs

文件：216.07 Kbytes Page：12 Pages

Octal Transceiver/Register with TRI-STATE Outputs

文件：216.07 Kbytes Page：12 Pages

Octal transceiver/register, non-inverting 3-State

DESCRIPTION The 74F646/74F646A and 74F648/74F648A transceivers/registers consist of bus transceiver circuits with 3–state outputs, D–type flip–flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus