Octal Transparent Latch with 3-STATE Outputs

General Description The 74F533 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Outpu

Octal Transparent Latch with TRI-STATE Outputs

文件：166.3 Kbytes Page：8 Pages

封装/外壳：20-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC LATCH TRANSP OCT 3ST 20SOP 集成电路（IC） 锁存器

Octal Transparent Latch with 3-STATE Outputs

General Description The 74F533 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Outpu

Latch/flip-flop

DESCRIPTION The 74F533 is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. FEATURES • 8-bit positive edge-triggered register – 74F534 • 3-State inverting output bu

Octal Transparent Latch with TRI-STATE Outputs

文件：166.3 Kbytes Page：8 Pages

Octal Transparent Latch with TRI-STATE Outputs

文件：166.3 Kbytes Page：8 Pages

Octal Transparent Latch with TRI-STATE Outputs

文件：166.3 Kbytes Page：8 Pages

Octal Transparent Latch with TRI-STATE Outputs

文件：166.3 Kbytes Page：8 Pages

Octal Transparent Latch with TRI-STATE Outputs

文件：166.3 Kbytes Page：8 Pages

Octal Transparent Latch with TRI-STATE Outputs

文件：166.3 Kbytes Page：8 Pages

Octal Transparent Latch with TRI-STATE Outputs

文件：166.3 Kbytes Page：8 Pages