9-Bit Parity Generator/Checker

General Description The F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is

9-Bit Parity Generator/Checker

文件：76.4 Kbytes Page：6 Pages

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC PARITY GEN/CHKER 9-BIT 14SOIC 集成电路（IC） 奇偶校验发生器和校验器

9-Bit Parity Generator/Checker

文件：152.49 Kbytes Page：8 Pages

9-Bit Parity Generator/Checker

General Description The F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC PARITY GEN/CHKER 9-BIT 14SOIC 集成电路（IC） 奇偶校验发生器和校验器

9-Bit Parity Generator/Checker

文件：152.49 Kbytes Page：8 Pages

9-Bit Parity Generator/Checker

文件：152.49 Kbytes Page：8 Pages

9-Bit Parity Generator/Checker

文件：152.49 Kbytes Page：8 Pages

9-bit odd/even parity generator/checker

DESCRIPTION The 74F280A is a 9-bit Parity Generator or Checker commonly used to detect errors in high speed data transmission or data retrieval systems. Both Even (∑E) and Odd (∑O) parity outputs are available for generating or checking even or odd parity on up to 9 bits. FEATURES • High-impe