Triple 3-Input NOR Gate

General Description This device contains three independent gates, each of which performs the logic NOR function.

Triple 3-input NOR gate

FEATURE • Industrial temperature range available (–40°C to +85°C)

Triple 3-input NOR gate

FEATURE • Industrial temperature range available (–40°C to +85°C) TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F27 3.0ns 6.5mA

Triple 3-Input NOR Gate

Octal D-Type Flip-Flop

General Description The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. Features ■Ideal buffer for MOS microprocessor or memory

Octal D flip-flop

DESCRIPTION The 74F273 has eight edge–triggered D–type flip–flops with individual D inputs and Q outputs. FEATURES • High impedance inputs for reduced loading (20µA in Low and High states) • Ideal buffer for MOS microprocessor or memory • Eight edge–triggered D–type flip–flops • Buffere

Octal D flip?밼lop

DESCRIPTION The 74F273 has eight edge–triggered D–type flip–flops with individual D inputs and Q outputs. FEATURES • High impedance inputs for reduced loading (20µA in Low and High states) • Ideal buffer for MOS microprocessor or memory • Eight edge–triggered D–type flip–flops • Buffere

Octal D flip-flop

DESCRIPTION The 74F273 has eight edge–triggered D–type flip–flops with individual D inputs and Q outputs. FEATURES • High impedance inputs for reduced loading (20µA in Low and High states) • Ideal buffer for MOS microprocessor or memory • Eight edge–triggered D–type flip–flops • Buffere

Octal D flip-flop

DESCRIPTION The 74F273 has eight edge–triggered D–type flip–flops with individual D inputs and Q outputs. FEATURES • High impedance inputs for reduced loading (20µA in Low and High states) • Ideal buffer for MOS microprocessor or memory • Eight edge–triggered D–type flip–flops • Buffere

Octal D-Type Flip-Flop

General Description The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. Features ■Ideal buffer for MOS microprocessor or memory

Octal D-Type Flip-Flop

General Description The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. Features ■Ideal buffer for MOS microprocessor or memory

Octal D-Type Flip-Flop

General Description The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. Features ■Ideal buffer for MOS microprocessor or memory

Triple 3-Input NOR Gate

General Description This device contains three independent gates, each of which performs the logic NOR function.

Triple 3-Input NOR Gate

General Description This device contains three independent gates, each of which performs the logic NOR function.

Triple 3-Input NOR Gate

General Description This device contains three independent gates, each of which performs the logic NOR function.

Octal D Flip-Flop

文件：167.19 Kbytes Page：8 Pages

Octal D flip-flop

Octal D flip-flop

Octal D Flip-Flop

文件：167.19 Kbytes Page：8 Pages

Octal D Flip-Flop

文件：167.19 Kbytes Page：8 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 功能：主复位 包装：管件 描述：IC FF D-TYPE SNGL 8BIT 20SOIC 集成电路（IC） 触发器

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 功能：主复位 包装：卷带（TR） 描述：IC FF D-TYPE SNGL 8BIT 20SOIC 集成电路（IC） 触发器

Octal D Flip-Flop

文件：167.19 Kbytes Page：8 Pages

High Q, high self-resonant frequency Varnish coated

文件：429.04 Kbytes Page：1 Pages

High Q, high self-resonant frequency Varnish coated

文件：429.04 Kbytes Page：1 Pages