16X5 asynchronous FIFO 3-State

DESCRIPTION This 80–bit active element First–In–First–Out (FIFO) is a monolithic Schottky–clamped transistor–transistor logic (STTL) array organized as 16–words of 5–bits each. A memory system using the ’F225 can be easily expanded in multiples of 16–words of 5–bits as shown in Figure 1. The 3–

16X5 asynchronous FIFO 3-State

封装/外壳：轴向 包装：散装 描述：FIXED IND 22UH 500MA 2 OHM TH 电感器，线圈，扼流圈 固定电感器

色环/插件电感

色环/插件电感

High Q, high self-resonant frequency Varnish coated

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封装/外壳：轴向 包装：散装 描述：FIXED IND 22UH 500MA 2 OHM TH 电感器，线圈，扼流圈 固定电感器

16X5 asynchronous FIFO 3-State

DESCRIPTION This 80–bit active element First–In–First–Out (FIFO) is a monolithic Schottky–clamped transistor–transistor logic (STTL) array organized as 16–words of 5–bits each. A memory system using the ’F225 can be easily expanded in multiples of 16–words of 5–bits as shown in Figure 1. The 3–

16X5 asynchronous FIFO 3-State

DESCRIPTION This 80–bit active element First–In–First–Out (FIFO) is a monolithic Schottky–clamped transistor–transistor logic (STTL) array organized as 16–words of 5–bits each. A memory system using the ’F225 can be easily expanded in multiples of 16–words of 5–bits as shown in Figure 1. The 3–