Low-power dual 2-input NAND Schmitt trigger

1. General description The 74AUP2G132 is a dual 2-input NAND gate with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IO

Low-power dual 2-input NAND Schmitt trigger

Low-power dual 2-input NAND Schmitt trigger

1. General description The 74AUP2G132 is a dual 2-input NAND gate with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IO

Low-power dual 2-input NAND Schmitt trigger

Low-power dual 2-input NAND Schmitt trigger

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封装/外壳：8-XFDFN 包装：卷带（TR） 描述：IC GATE NAND 2CH 2IN 8XSON 集成电路（IC） 门和反相器

Low-power dual 2-input NAND Schmitt trigger

1. General description The 74AUP2G132 is a dual 2-input NAND gate with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IO

Low-power dual 2-input NAND Schmitt trigger