Low-power D-type flip-flop with set and reset; positive-edge trigger

1. General description The 74AUP1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

Low-power D-type flip-flop with set and reset; positive-edge trigger

1. General description The 74AUP1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transi

Low-power D-type flip-flop with set and reset; positive-edge trigger

文件：112.63 Kbytes Page：23 Pages

Low-power D-type flip-flop with set and reset; positive-edge trigger

封装/外壳：8-XFDFN 功能：设置（预设）和复位 包装：管件 描述：IC FF D-TYPE SNGL 1BIT 8XSON 集成电路（IC） 触发器

Low-power D-type flip-flop with set and reset; positive-edge trigger

文件：112.63 Kbytes Page：23 Pages

Low-power D-type flip-flop with set and reset; positive-edge trigger