Low-power inverting buffer/line driver; 3-state

Low-power inverting buffer/line driver; 3-state

1. General description The 74AUP1G240 is a 1-bit inverting buffer/line driver with 3-state outputs. The device features an output enable (OE). A HIGH on OE causes the output to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input ris

Low-power inverting buffer/line driver; 3-state

文件：99.39 Kbytes Page：19 Pages

Low-power inverting buffer/line driver; 3-state

Low-power inverting buffer/line driver; 3-state

Low-power inverting buffer/line driver; 3-state

1. General description The 74AUP1G240 is a 1-bit inverting buffer/line driver with 3-state outputs. The device features an output enable (OE). A HIGH on OE causes the output to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input ris

Low-power inverting buffer/line driver; 3-state

文件：99.39 Kbytes Page：19 Pages

inverting buffer/line driver; 3-state

Features » Wide supply voltage range from 0.8V 10 3.6V. « Inputs accept voltages up to 3.6 « lor supports partial-power-down mode » Low static power consumption; lcc=0.5A (Max.) » ESD Protection Exceeds JESD 22 ~2000-V Human-Body Model (A114-A) -200-V Machine Model (A115-A) -1000-V Charged

封装/外壳：5-TSSOP，SC-70-5，SOT-353 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUFFER INVERT 3.6V 5TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Low-power inverting buffer/line driver; 3-state

Low-power inverting buffer/line driver; 3-state

文件：99.39 Kbytes Page：19 Pages