Low-power D-type flip-flop with reset; positive-edge trigger

1. General description The 74AUP1G175 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), master reset (MR) inputs, and Q output. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-fl

Low-power D-type flip-flop with reset; positive-edge trigger

1. General description The 74AUP1G175 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), master reset (MR) inputs, and Q output. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-fl

Low-power D-type flip-flop with reset; positive-edge trigger

文件：92.11 Kbytes Page：26 Pages

Low-power D-type flip-flop with reset; positive-edge trigger

封装/外壳：6-XFDFN 功能：复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 1BIT 6XSON 集成电路（IC） 触发器

Low-power D-type flip-flop with reset; positive-edge trigger

文件：92.11 Kbytes Page：26 Pages

Low-power D-type flip-flop with reset; positive-edge trigger