封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR） 描述：IC BUF NON-INVERT 3.6V 56TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

18-bit buffer/driver 3-State

DESCRIPTION The 74ALVCH16825 is an 18–bit non-inverting buffer/driver with 3-State outputs for bus-oriented applications. FEATURES • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Curr

18-bit buffer/driver; 3-state

1 General description The 74ALVCH16825 is an 18–bit non-inverting buffer/driver with 3-state outputs for bus-oriented applications. The 74ALVCH16825 consists of two 9-bit sections with separate output enable signals. For either 9-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1

18-bit buffer/driver; 3-state

1 General description The 74ALVCH16825 is an 18–bit non-inverting buffer/driver with 3-state outputs for bus-oriented applications. The 74ALVCH16825 consists of two 9-bit sections with separate output enable signals. For either 9-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1

18-bit buffer/driver 3-State

DESCRIPTION The 74ALVCH16825 is an 18–bit non-inverting buffer/driver with 3-State outputs for bus-oriented applications. FEATURES • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Curr

18-bit Buffers / Drivers with 3-state Outputs

Description The HD74ALVCH16825 improves the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as two 9-bit buffers or one 18-bit buffer. It provides true data. The 3-state control gate is a 2-input AND gat