封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR） 描述：IC TXRX NON-INVERT 3.6V 56TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

16-bit transceiver/register with dual enable; 3-state

1. General description The 74ALVCH16652 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, Dtype flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Data on the ‘A’ or ‘B’, or

16-bit transceiver/register with dual enable; 3-state

DESCRIPTION The 74ALVCH16652 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. FEATURES • In accordance with JE

16-bit transceiver/register with dual enable; 3-state

DESCRIPTION The 74ALVCH16652 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. FEATURES • In accordance with JE

16-bit transceiver/register with dual enable; 3-state

1. General description The 74ALVCH16652 consists of 16 non-inverting bus transceiver circuits with 3-state outputs, Dtype flip-flops and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Data on the ‘A’ or ‘B’, or

3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS AND BUS-HOLD

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