封装/外壳：56-TFSOP（0.240"，6.10mm 宽） 包装：管件 描述：IC UNIV BUS TXRX 18BIT 56TSSOP 集成电路（IC） 通用总线功能

18-bit universal bus transceiver 3-State

DESCRIPTION The 74ALVCH16601 is an 18-bit universal bus transceiver. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8-1A • CMOS low power consumption • Direct interface with TTL levels • Univeral bus transceiver with D-type latches and D-type

18-bit universal bus transceiver; 3-state

1. General description The 74ALVCH16601 is an 18-bit universal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CP

18-bit universal bus transceiver; 3-state

1. General description The 74ALVCH16601 is an 18-bit universal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CP

18-bit universal bus transceiver 3-State

DESCRIPTION The 74ALVCH16601 is an 18-bit universal bus transceiver. FEATURES • Wide supply voltage range of 1.2 V to 3.6 V • In accordance with JEDEC standard no. 8-1A • CMOS low power consumption • Direct interface with TTL levels • Univeral bus transceiver with D-type latches and D-type

18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

文件：142.4 Kbytes Page：10 Pages