3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD

FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC LATCH 16BIT TRANSP D 48-TSSOP 集成电路（IC） 锁存器

3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH

文件：95.73 Kbytes Page：6 Pages

Low Voltage 16-Bit Transparent Latch with Bushold and 26??Series Resistors in Outputs

General Description The ALVCH162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets

3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD

FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ

封装/外壳：48-TFSOP（0.240"，6.10mm 宽） 包装：卷带（TR） 描述：IC XPARENT LATCH 16BIT D 48TSSOP 集成电路（IC） 锁存器

3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH

文件：95.73 Kbytes Page：6 Pages

3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD

FEATURES: • 0.5 MICRON CMOS Technology • Typical tSK(o) (Output Skew) 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) • VCC = 3.3V ± 0.3V, Normal Range • VCC = 2.7V to 3.6V, Extended Range • VCC = 2.5V ± 0.2V • CMOS power levels (0.4μ W typ

3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH

文件：95.73 Kbytes Page：6 Pages