Hex inverter

DESCRIPTION The 74AHC/AHCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT04 provide six inverting buffers. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceed

Hex inverter

1. General description The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible with Lowpower Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC04; 74AHCT04 provides six inverting buffers. 2. Features and benefits • Balanced propa

hex inverter

The 74AHC04; 74AHCT04 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC04; 74AHCT04 provides six inverting buffers. • Balanced propagation delays\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC04: CMOS level\n• For 74AHCT04: TTL level\n\n• ESD protection:• HBM EIA/JESD22-A114F exceeds 2000 V\n• MM EIA/JESD22-A115-A exceeds 200 V\n• CDM EIA/JESD22-C101C exceeds 1000 V\n\n• Multiple package op;

Hex inverter

The 74AHC04-Q100; 74AHCT04-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC04-Q100; 74AHCT04-Q100 provides six inverting buffers.\n This product has been qualified to the A • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Balanced propagation delays\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC04-Q100: CMOS level\n• For 74AHCT04-Q100: TTL level\n\n• ESD prot;

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC INVERTER 6CH 1-INP 14SO 集成电路（IC） 门和反相器

Hex inverter

文件：701.74 Kbytes Page：15 Pages

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC INVERTER 6CH 1-INP 14SO 集成电路（IC） 门和反相器

Hex inverter

DESCRIPTION The 74AHC/AHCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT04 provide six inverting buffers. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceed

Hex inverter

DESCRIPTION The 74AHC/AHCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT04 provide six inverting buffers. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceed

HEX INVERTERS

文件：623.52 Kbytes Page：17 Pages

HEX INVERTERS

文件：623.52 Kbytes Page：17 Pages