74AHC74价格
参考价格：￥0.5174
型号：74AHC74BQ,115 品牌：NXP 备注：这里有74AHC74多少钱，2026年最近7天走势，今日出价，今日竞价，74AHC74批发/采购报价，74AHC74行情走势销售排行榜，74AHC74报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74AHC74 | Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74AHC/AHCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V | PHILIPS 飞利浦 |   | |
74AHC74 | Dual D-type flip-flop with set and reset; positive-edge trigger 1. General description The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data | NEXPERIA 安世 | | |
Dual D-type flip-flop with set and reset; positive-edge trigger | ETC 知名厂家 | ETC | | |
Dual D-type flip-flop with set and reset; positive-edge trigger | ETC 知名厂家 | ETC | | |
Dual D-type flip-flop with set and reset; positive-edge trigger 1. General description The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset positive-edge trigger General description The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. Features and benefits ■ Automotive product qualification in accordance with AEC-Q100 (Gra | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC74-Q100; 74AHCT74-Q100 is a dual positive-edge triggered, D-type flip-flop with individual data inpu • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC74-Q100: CMOS level\n•; | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data inputs (D), clock inputs • Balanced propagation delays\n• All inputs have Schmitt-trigger actions\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC74: CMOS level\n• For 74AHCT74: TTL level\n\n• ESD protection:• HBM EIA/JESD22-A114E exceeds 2000 V\n• MM EIA/JESD22-A115-A exceeds 200 V\n• CDM EIA/JESD22-C1; | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1. General description The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger | ETC 知名厂家 | ETC | | |
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74AHC/AHCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V | PHILIPS 飞利浦 | | ||
Dual D-type flip-flop with set and reset positive-edge trigger General description The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. Features and benefits ■ Automotive product qualification in accordance with AEC-Q100 (Gra | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger 1. General description The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual data | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74AHC/AHCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V | PHILIPS 飞利浦 | | ||
Dual D-type flip-flop with set and reset; positive-edge trigger | ETC 知名厂家 | ETC | | |
Dual D-type flip-flop with set and reset; positive-edge trigger DESCRIPTION The 74AHC/AHCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V | PHILIPS 飞利浦 | | ||
Dual D-type flip-flop with set and reset positive-edge trigger General description The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. Features and benefits ■ Automotive product qualification in accordance with AEC-Q100 (Gra | NEXPERIA 安世 | | ||
Dual D-type flip-flop with set and reset positive-edge trigger General description The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. Features and benefits ■ Automotive product qualification in accordance with AEC-Q100 (Gra | NEXPERIA 安世 | | ||
封装/外壳：14-VFQFN 裸露焊盘 功能：设置（预设）和复位 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE DUAL 1BIT 14DHVQFN 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
D-Type Flip-Flops | NEXPERIA 安世 | | ||
封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：设置（预设）和复位 包装：管件 描述：IC FF D-TYPE DUAL 1BIT 14SO 集成电路（IC） 触发器 | ETC 知名厂家 | ETC | | |
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET 文件：105.64 Kbytes Page：19 Pages | TI 德州仪器 | |
74AHC74产品属性
- 类型
描述
- VCC (V)：
2.0 - 5.5
- Logic switching levels：
CMOS
- Output drive capability (mA)：
± 8
- tpd (ns)：
3.7
- fmax (MHz)：
170
- Power dissipation considerations：
low
- Tamb (°C)：
-40~125
- Rth(j-a) (K/W)：
106
- Ψth(j-top) (K/W)：
20.9
- Rth(j-c) (K/W)：
74
- Package name：
DHVQFN14
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
NEXPERIA |
24+ |
TSSOP14 |
120524 |
原装正品,现货库存,1小时内发货 |
|||
NEXPERIA/安世 |
25+ |
SOT402-1 |
600000 |
NEXPERIA/安世全新特价74AHC74PW-Q100J即刻询购立享优惠#长期有排单订 |
|||
NEXPERIA/安世 |
22+ |
SOP |
300 |
只做原装真实库存13714450367 |
|||
恩XP |
24+ |
QR |
9800 |
一级代理/全新原装现货/长期供应! |
|||
恩XP |
24+ |
SOP-14 |
45000 |
只做原装进口现货 |
|||
NEXPERIA |
25+ |
SMD |
918000 |
明嘉莱只做原装正品现货 |
|||
恩XP |
25+ |
N/A |
21000 |
原装正品现货,原厂订货,可支持含税原型号开票。 |
|||
NEXPERIA |
24+ |
N/A |
10000 |
只做原装,实单最低价支持 |
|||
NEXPERIA/安世 |
23+ |
NA |
9990 |
只有原装 |
|||
NEXPERIA |
2025+ |
N/A |
70000 |
柒号只做原装 现货价秒杀全网 |
74AHC74芯片相关品牌
74AHC74规格书下载地址
74AHC74参数引脚图相关
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