Quad buffer/line driver; 3-state

DESCRIPTION The 74AHC/AHCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT125 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) a

Quad buffer/line driver; 3-state

DESCRIPTION The 74AHC/AHCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT125 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) a

Quad buffer/line driver; 3-state

Quad buffer/line driver; 3-state

1. General description The 74AHC125; 74AHCT125 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs are overvoltage tolerant. This feature allows the use of these devices as

QUADRUPLE 3-STATE BUFFERS OE LOW

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Quad buffer/line driver; 3-state