Quad 2-input NOR gate

DESCRIPTION The 74AHC/AHCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT02 provides the Quad 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-

Quad 2-input NOR gate

Quad 2-input NOR gate

Quad 2-input NOR gate

1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC02; 74AHCT02 provides a quad 2-input NOR function. 2. Features and benefits • Balance

四路 2 输入正或非门

74AHC02 是一款四路 2 输入正或非门。其电源电压范围为 2.0V 至 5.5V。该器件以正逻辑实现布尔函数 Y = A × B 或 Y = A+B。\n74AHC02 采用绿色 TSSOP-14、SOIC-14 和 TQFN-2.5×3-14L 封装，工作环境温度范围为 -40℃ 至 +125℃。 • 宽电源电压范围：2.0V 至 5.5V\n• 输入接受高于电源电压且最高可达 5.5V 的电压\n• +8mA/-8mA 输出电流\n• 低功耗：ICC = 0.1µA（典型值）\n• -40℃ 至 +125℃ 工作温度范围\n• 采用绿色 TSSOP-14、SOIC-14 和 TQFN-2.5×3-14L 封装;

Quad 2-input NOR gate

1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC02; 74AHCT02 provides a quad 2-input NOR function. 2. Features and benefits • Balance

Quad 2-input NOR gate

Quad 2-input NOR gate

Quad 2-input NOR gate

The 74AHC02-Q100; 74AHCT02-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC02-Q100; 74AHCT02-Q100 provides a quad 2-input NOR function.\n This product has been qualified to • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40°C to +85°C and from -40°C to +125°C\n\n• Balanced propagation delays\n• All inputs have a Schmitt-trigger action\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC02-Q100: CMOS level\n• Fo;

Quad 2-input NOR gate

The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.\n The 74AHC02; 74AHCT02 provides a quad 2-input NOR function. • Balanced propagation delays\n• All inputs have a Schmitt-trigger action\n• Inputs accept voltages higher than VCC\n• Input levels:• For 74AHC02: CMOS level\n• For 74AHCT02: TTL level\n\n• ESD protection:• HBM EIA/JESD22-A114E exceeds 2000 V\n• MM EIA/JESD22-A115-A exceeds 200 V\n• CDM EIA/JESD22-C;

Quad 2-input NOR gate

1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC02; 74AHCT02 provides a quad 2-input NOR function. 2. Features and benefits • Balance

Quad 2-input NOR gate

Quad 2-input NOR gate

DESCRIPTION The 74AHC/AHCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT02 provides the Quad 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-

Quad 2-input NOR gate

Quad 2-input NOR gate

Quad 2-input NOR gate

DESCRIPTION The 74AHC/AHCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT02 provides the Quad 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-

Quad 2-input NOR gate

Quad 2-input NOR gate

1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC02; 74AHCT02 provides a quad 2-input NOR function. 2. Features and benefits • Balance

Quad 2-input NOR gate

DESCRIPTION The 74AHC/AHCT02 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT02 provides the Quad 2-input OR function. FEATURES • ESD protection: HBM EIA/JESD22-A114-

Automotive product qualification in accordance with AEC-Q100

文件：717.71 Kbytes Page：15 Pages

封装/外壳：14-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC GATE NOR 4CH 2-INP 14DHVQFN 集成电路（IC） 门和反相器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC GATE NOR 4CH 2-INP 14SO 集成电路（IC） 门和反相器

Automotive product qualification in accordance with AEC-Q100

文件：717.71 Kbytes Page：15 Pages

Automotive product qualification in accordance with AEC-Q100

文件：717.71 Kbytes Page：15 Pages

Automotive product qualification in accordance with AEC-Q100

文件：717.71 Kbytes Page：15 Pages

QUADRUPLE 2-INPUT POSITIVE-NOR GATES

文件：86.85 Kbytes Page：6 Pages