16K x 18 SuperSync FIFO, 5.0V

The 72265 is a 16K x 18 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin (FS) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK, is running at the higher frequency. SuperSync FIFOs are particularly appropriate f Pin-compatible with the 722x5 SuperSync FIFOs\n10ns read/write cycle time (8ns access time)\nFixed, low first word data latency time\nAuto power down minimizes standby power consumption\nRetransmit operation with fixed, low first word data latency time\nEmpty, Full and Half-Full flags signal FIFO st;

包装：散装 描述：HEX CONTRACTOR POWER BIT 4.0MM 1 工具 螺丝和螺母起子 - 刀头、刀片和手柄

封装/外壳：64-LQFP 功能：同步 包装：托盘 描述：IC FIFO 8KX18 LP 10NS 64QFP 集成电路（IC） FIFO 存储器

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SUPERSYNC FIFOO 8,192 x 18, 16,384 x 18

DESCRIPTION: The IDT72255/72265 are monolithic, CMOS, high capacity, high speed, low power First-In, First-Out (FIFO) memories with clocked read and write controls. These FIFOs are applicable for a wide variety of data buffering needs, such as optical disk controllers, local area networks (LANs),

CMOS SuperSync FIFO™ 8,192 x 18 16,384 x 18

FEATURES • Choose among the following memory organizations: IDT72255LA — 8,192 x 18 IDT72265LA — 16,384 x 18 • Pin-compatible with the IDT72275/72285 SuperSync FIFOs • 10ns read/write cycle time (8ns access time) • Fixed, low first word data latency time • Auto power down minimizes standby

CMOS SuperSync FIFO

文件：488.38 Kbytes Page：27 Pages

CMOS SuperSync FIFO

文件：328.5 Kbytes Page：27 Pages