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71V3558S价格

参考价格:¥54.5999

型号:71V3558S133PFGI 品牌:IDT 备注:这里有71V3558S多少钱,2026年最近7天走势,今日出价,今日竞价,71V3558S批发/采购报价,71V3558S行情走势销售排行榜,71V3558S报价。
型号 功能描述 生产厂家 企业 LOGO 操作
71V3558S

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

Features ◆ 128K x 36, 256K x 18 memory configurations ◆ Supports high performance system speed - 166 MHz (x36) (3.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Pos

RENESAS

瑞萨

封装/外壳:100-LQFP 包装:管件 描述:IC SRAM 4.5MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

RENESAS

瑞萨

封装/外壳:100-LQFP 包装:卷带(TR) 描述:IC SRAM 4.5MBIT PARALLEL 100TQFP 集成电路(IC) 存储器

RENESAS

瑞萨

128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

文件:643.03 Kbytes Page:28 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:489.92 Kbytes Page:25 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:489.92 Kbytes Page:25 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:489.92 Kbytes Page:25 Pages

IDT

3.3V Synchronous ZBT SRAMs

文件:489.92 Kbytes Page:25 Pages

IDT

更新时间:2026-5-24 11:09:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
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IDT, Integrated Device Technol
24+25+
16500
全新原厂原装现货!受权代理!可送样可提供技术支持!
RENESAS(瑞萨)/IDT
2447
TQFP-100(14x14)
315000
72个/托盘一级代理专营品牌!原装正品,优势现货,长
ALTERA
最新
BGA
1680
只做进口原装!假一罚十!绝对有货!
IDT
23+
QFP
50000
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Renesas
25+
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7800
公司现货,提供拆样技术支持
IDT, Integrated Device Technol
24+
100-TQFP(14x14)
56200
一级代理/放心采购
IDT
13+
sopdip
1000
优势供货假一赔十-军工器件供货商
IDT
2026+
100TQFP
65248
百分百原装现货 实单必成

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