NETWORKING CLOCK SOURCE

Description The ICS650-27 is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking ch

NETWORKING CLOCK SOURCE

Features • Packaged in 20-pin (150 mil) SSOP (QSOP) • Pb (lead) free package, RoHS compliant • 12.5 MHz or 25 MHz fundamental crystal or clock input • Six output clocks with selectable frequencies • SDRAM frequencies of 67, 83, 100, and 133 MHz • Buffered crystal reference output • Zero ppm

Networking Clock Source

Description The ICS650-27 is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking ch

封装/外壳：20-SSOP（0.154"，3.90mm 宽） 包装：托盘 描述：IC CLK SOURCE NETWORK 20-SSOP 集成电路（IC） 时钟发生器，PLL，频率合成器

时钟发生器及支持产品 SYSTEM PERIPHERAL CLOCK SOURCE

NETWORKING CLOCK SOURCE

Features • Packaged in 20-pin (150 mil) SSOP (QSOP) • Pb (lead) free package, RoHS compliant • 12.5 MHz or 25 MHz fundamental crystal or clock input • Six output clocks with selectable frequencies • SDRAM frequencies of 67, 83, 100, and 133 MHz • Buffered crystal reference output • Zero ppm

NETWORKING CLOCK SOURCE

Description The ICS650-27 is a low cost, low jitter, high performance clock synthesizer for networking applications. Using analog Phase-Locked Loop (PLL) techniques, the device accepts a 12.5 MHz or 25 MHz clock or fundamental mode crystal input to produce multiple output clocks for networking ch

时钟发生器及支持产品 SYSTEM PERIPHERAL CLOCK SOURCE

封装/外壳：20-SSOP（0.154"，3.90mm 宽） 包装：托盘 描述：IC CLOCK SYNTHESIZER 20-SSOP 集成电路（IC） 时钟发生器，PLL，频率合成器