5CEBA价格
参考价格：￥372.5584
型号：5CEBA2F17C6N 品牌：Altera 备注：这里有5CEBA多少钱，2026年最近7天走势，今日出价，今日竞价，5CEBA批发/采购报价，5CEBA行情走势销售排行榜，5CEBA报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 |   | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | | ||
Cyclone V Device Overview The Cyclone® V devices are designed to simultaneously accommodate the shrinking power consumption, cost, and time-to-market requirements; and the increasing bandwidth requirements for high-volume and cost-sensitive applications. Enhanced with integrated transceivers and hard memory controllers, | INTEL 英特尔 | |
5CEBA产品属性
- 类型
描述
- ECCN：
EAR99
- CCATS：
NA
- US HTS：
8542390001
- PCN 可用：
Yes
- MDDS 配置 ID：
697268
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
ALTERA/阿尔特拉 |
23+ |
BGA |
5000 |
一站式BOM配单 |
|||
Altera |
21+ |
BGA |
26800 |
只做原装,质量保证 |
|||
Intel FPGAs/Altera |
21+ |
665-BBGA,FCBGA |
3860 |
进口原装!长期供应!绝对优势价格(诚信经营 |
|||
ALTERA/阿尔特拉 |
2022+ |
NA |
6600 |
||||
ALTERA(阿尔特拉) |
26+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
|||
ALTERA(阿尔特拉) |
24+ |
N/A |
15800 |
原装正品现货支持实单 |
|||
ALTERA |
23+ |
256FBGA |
1200 |
中国领先的ALTERA嵌入式专业分销商!原装正品! |
|||
ALTERA |
23+ |
BGA |
10000 |
正规渠道,只有原装! |
|||
ALTERA |
25+ |
BGA |
20000 |
原装正品 实单找我 |
|||
ALTERA/阿尔特拉 |
2026+ |
65248 |
百分百原装现货 实单必成 |
5CEBA规格书下载地址
5CEBA参数引脚图相关
- 74ls164
- 74ls138
- 74ls04
- 74ls00
- 74hc595
- 74hc573
- 74hc541
- 74hc244
- 74hc164
- 7490
- 7241
- 7169
- 700t
- 6657
- 6612
- 6445
- 6280
- 61010
- 60016
- 60005
- 5CSXC4
- 5CSTD6
- 5CSTD5
- 5CSEA6
- 5CSEA5
- 5CSEA4
- 5CSEA2
- 5CQ10KE
- 5CJ10KE
- 5CHLW
- 5CH10KE
- 5CGXC9
- 5CGXC7
- 5CGXC5
- 5CGXC4
- 5CGXC3
- 5CGTD9
- 5CGTD7
- 5CGTD5
- 5CF10KE
- 5CEBA9F23C8N
- 5CEBA7F27C7N
- 5CEBA7F23C8N
- 5CEBA7F23C7N
- 5CEBA5F23C8N
- 5CEBA4U19C8N
- 5CEBA4U19C7N
- 5CEBA4U15C8N
- 5CEBA4U15C7N
- 5CEBA4F23C8N
- 5CEBA4F17I7N
- 5CEBA4F17C8N
- 5CEBA2U19C8N
- 5CEBA2U15I7N
- 5CEBA2U15C6N
- 5CEBA2F23C8N
- 5CEBA2F23C7N
- 5CEBA2F17I7N
- 5CEBA2F17C8N
- 5CEBA2F17C6N
- 5CD10KE
- 5CCEG
- 5CB10KE
- 5CA-00039P1
- 5C9551
- 5C9549
- 5C9547
- 5C9539
- 5C90
- 5C75
- 5C628L
- 5C60
- 5C5T
- 5C5
- 5C45
- 5C430L
- 5C-2N
- 5C2822
- 5C2232
- 5C20
- 5C2
- 5C1951
- 5C1939
- 5C-19
- 5C180
- 5C-18
- 5C-17
- 5C-16
- 5C-15
- 5C-14
- 5C-13
- 5C120
- 5C1191
- 5BWC
- 5BW8
- 5BT8
- 5BS
- 5BQ7A/5BZ7A
- 5BP-5BP-6HR
- 5BK7A
5CEBA数据表相关新闻
5CEBA2U15C8N
5CEBA2U15C8N
2024-1-95CEBA2U15C8N渠道优势
价格好说
2023-3-215AGZME7K2F40I3LN FPGA - 现场可编程门阵列 FPGA - Arria V GZ 16980 LABS 674 IOs
5AGZME7K2F40I3LN FPGA - 现场可编程门阵列 FPGA - Arria V GZ 16980 LABS 674 IOs
2023-2-35AGXFB3H4F40C5NES FPGA - 现场可编程门阵列 FPGA - Arria V GX Engineering Sample
5AGXFB3H4F40C5NES 逻辑元件数量: 362000 LE 输入/输出端数量: 704 I/O 电源电压-最小: 1.1 V 电源电压-最大: 1.1 V
2023-2-35AGXMA5G4F31I5N FPGA - 现场可编程门阵列
5AGXMA5G4F31I5N FPGA - 现场可编程门阵列
2020-12-45CEBA4F17C6N
FBGA-672 FPGA - 现场可编程门阵列 , 56 I/O FPGA - 现场可编程门阵列 , MAX 10 10M08 FPGA - 现场可编程门阵列 , UBGA-169 MAX 10 10M16 FPGA - 现场可编程门阵列 , Cyclone II FPGA - 现场可编程门阵列 , Arria 10 GX 288 I/O FPGA - 现场可编程门阵列
2020-8-17
DdatasheetPDF页码索引
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