DS90C032QML LVDS Quad CMOS Differential Line Receiver

1FEATURES 2• Single Event Latchup (SEL) Immune 120 MeVcm2/ mg • High Impedance LVDS Inputs with Power-Off. • Accepts Small Swing (330 mV) Differential Signal Levels • Low Power Dissipation • Low Differential Skew • Low Chip to Chip Skew • Pin Compatible with DS26C32A • Compatible with IE

DS90C032QML LVDS Quad CMOS Differential Line Receiver

文件：722.02 Kbytes Page：19 Pages

Quad Receiver

INTRODUCTION The UT54LVDS032 Quad Receiver is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (

Quad Receiver

INTRODUCTION The UT54LVDS032 Quad Receiver is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (

Quad Receiver

INTRODUCTION The UT54LVDS032 Quad Receiver is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (

Quad Receiver

INTRODUCTION The UT54LVDS032 Quad Receiver is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (

Quad Receiver

INTRODUCTION The UT54LVDS032 Quad Receiver is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (