Quad 2-Input NAND Gate

Description The CD54AC00F3A and CD54ACT00F3A are quad 2-input NAND gates that utilize the Harris Advanced CMOS Logic technology. Features • This Circuit is Processed in Accordance to MIL-STD-883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. • Exceeds 2kV ESD Protection MIL-S

Advanced CMOS Logic

Features:  Outputs Sink/Source 24mA  Low Input Current: 1μA  Outputs directly interface CMOS, NMOS and TTL  Operating Voltage Range: 2V to 6V  CMOS High Noise Immunity  Function compatible with 54HC00 or 54LS00  Full Military Temperature Range.

Advanced CMOS Logic

Features:  Outputs Sink/Source 24mA  Low Input Current: 1μA  Outputs directly interface CMOS, NMOS and TTL  Operating Voltage Range: 2V to 6V  CMOS High Noise Immunity  Function compatible with 54HC00 or 54LS00  Full Military Temperature Range.

Advanced CMOS Logic

Features:  Outputs Sink/Source 24mA  Low Input Current: 1μA  Outputs directly interface CMOS, NMOS and TTL  Operating Voltage Range: 2V to 6V  CMOS High Noise Immunity  Function compatible with 54LS139  Full Military Temperature Range.

Advanced CMOS Logic

Features:  Outputs Sink/Source 24mA  Low Input Current: 1μA  Outputs directly interface CMOS, NMOS and TTL  Operating Voltage Range: 2V to 6V  CMOS High Noise Immunity  Function compatible with 54LS139  Full Military Temperature Range.

Advanced CMOS Logic

Hex Schmitt-Trigger Inverter Logic IC in bare die form Description The 54AC14 Hex Schmitt-Trigger Inverter is fabricated using a 1.5μm 5V CMOS process with the same high speed performance of LSTTL combined with CMOS low power consumption. The device performs the Boolean function Y = Ᾱ in p

Hex Schmitt-Trigger Inverter Logic IC in bare die form

Description The 74AC14 Hex Schmitt-Trigger Inverter is fabricated using a 1.5μm 5V CMOS process with the same high speed performance of LSTTL combined with CMOS low power consumption. The device performs the Boolean function Y = Ᾱ in positive logic. Device inputs are compatible with Standard

Advanced CMOS Logic

Features:  Outputs Sink/Source 24mA  Low Input Current: 1μA  Outputs directly interface CMOS, NMOS and TTL  Operating Voltage Range: 2V to 6V  CMOS High Noise Immunity  Function compatible with 54HC14 or 54LS14  Full Military Temperature Range.

Rad-hard advanced high-speed 5 V CMOS logic series

Description The 54AC and 54ACT series represent over 60 product types with different high-speed CMOS functions, specifically designed to meet the radiation requirements of the aerospace industry. They include a large set of gates, flip-flops, multiplexers, counters, bus interfaces, and several

Advanced CMOS Logic

Features:  Outputs Sink/Source 24mA  Low Input Current: 1μA  Outputs directly interface CMOS, NMOS and TTL  Operating Voltage Range: 2V to 6V  CMOS High Noise Immunity  Function compatible with 54HC14 or 54LS14  Full Military Temperature Range.

Dual 4-Input Multiplexer

Description The CD54AC153/3A and CD54ACT153/3A are dual 4-input multiplexers that utilize the Harris Advanced CMOS Logic technology. One of the four sources for each section is selected by the common Select inputs, S0 and S1. When the Enable inputs (1E, 2E) are HIGH, the outputs are in the low st

16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC  (Enhanced-Performance Implanted CMOS) 1-
m P

16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-um Pro

16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-um Pro

16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

Members of the Texas Instruments WidebusE Family 3-State True Outputs Full Parallel Access for Loading Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPICE (Enhanced-Performance Implanted CMOS) 1-mm Process 50

Rad-hard 16-bit transceiver, 3.3 V to 5 V bidirectional level shifter

Description The 54AC and 54ACT series represent over 60 product types with different high-speed CMOS functions, specifically designed to meet the radiation requirements of the aerospace industry. They include a large set of gates, flip-flops, multiplexers, counters, bus interfaces, and several

16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

Members of the Texas Instruments Widebus Family 3-State Outputs Drive Bus Lines Directly Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical La

Quad 2-Input NAND Gate

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Advanced CMOS Logic

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Quad 2-Input NAND Gate

Quad 2-Input NOR Gate

Quad 2-Input NOR Gate

文件：111.8 Kbytes Page：6 Pages

Quad 2-Input NOR Gate

文件：111.8 Kbytes Page：6 Pages

Quad 2-Input NOR Gate

Quad 2-Input NOR Gate

文件：111.8 Kbytes Page：6 Pages

Quad 2-Input NOR Gate

文件：111.8 Kbytes Page：6 Pages

Hex Inverter

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Hex Inverter

文件：114.36 Kbytes Page：6 Pages

Hex Inverter

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Hex Inverter

文件：114.36 Kbytes Page：6 Pages

Hex Inverter

文件：25.2 Kbytes Page：5 Pages

Hex Inverter

文件：114.36 Kbytes Page：6 Pages

Hex Inverter

文件：25.2 Kbytes Page：5 Pages

Hex Inverter with Open Drain Outputs

文件：113.12 Kbytes Page：6 Pages

Hex Inverter with Open Drain Outputs

文件：113.12 Kbytes Page：6 Pages

Hex Inverter with Open Drain Outputs

文件：113.12 Kbytes Page：6 Pages

Hex Inverter with Open Drain Outputs

文件：113.12 Kbytes Page：6 Pages

Quad 2-Input AND Gate

文件：110.52 Kbytes Page：6 Pages

Quad 2-Input AND Gate

文件：110.52 Kbytes Page：6 Pages

Quad 2-Input AND Gate

文件：110.52 Kbytes Page：6 Pages

Quad 2-Input AND Gate

文件：110.52 Kbytes Page：6 Pages

Triple 3-Input NAND Gate

文件：110.87 Kbytes Page：6 Pages

Dual JK Positive Edge-Triggered Flip-Flop

文件：167.82 Kbytes Page：8 Pages

Dual JK Positive Edge-Triggered Flip-Flop

文件：167.82 Kbytes Page：8 Pages

Dual JK Positive Edge-Triggered Flip-Flop

文件：167.82 Kbytes Page：8 Pages

Dual JK Positive Edge-Triggered Flip-Flop

文件：167.82 Kbytes Page：8 Pages

Triple 3-Input NAND Gate

文件：110.87 Kbytes Page：6 Pages

Triple 3-Input NAND Gate

文件：110.87 Kbytes Page：6 Pages

Triple 3-Input NAND Gate

文件：110.87 Kbytes Page：6 Pages

Triple 3-Input AND Gate

文件：110.46 Kbytes Page：6 Pages

QUADRUPLE 2-INPUT POSITIVE-NOR GATES

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TRIPLE 3-IMPUT POSITIVE-NAND GATES

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TRIPLE 3-INPUT POSITIVE-AND GATES

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TRIPLE 3-INPUT POSITIVE-AND GATES

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HEX SCHMITT-TRIGGER INVERTERS

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HEX SCHMITT-TRIGGER INVERTERS

文件：94.1 Kbytes Page：5 Pages

HEX SCHMITT-TRIGGER INVERTERS

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DUAL 4-INPUT POSITIVE-NAND GATES

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