SDRAM(512K X 2 BANKS X 16 BITS SDRAM)

GENERAL DESCRIPTION 50S116T is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words ´ 2 banks ´ 16 bits. Using pipelined architecture 50S116T delivers a data bandwidth of up to 400M bytes per second (-5). For different applications the 50S116T is sorted into the

512K x 2 Banks x 16 BITS SDRAM

SDRAM

文件：784.7 Kbytes Page：6 Pages

SDRAM

文件：92.73 Kbytes Page：7 Pages