Performance line, ARM-based 32-bit MCU with Flash, USB, CAN, seven 16-bit timers, two ADCs and nine communication interfaces

Features ■ Core: ARM 32-bit Cortex™-M3 CPU – 72 MHz, 90 DMIPS with 1.25 DMIPS/MHz – Single-cycle multiplication and hardware division – Nested interrupt controller with 43 maskable interrupt channels – Interrupt processing (down to 6 CPU cycles) with tail chaining ■ Memories –

Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 communication interfaces

The STM32F103xx medium-density performance line family incorporates the high performance ARM Cortex™-M3 32-bit RISC core operating at a 72 MHz frequency, high speed embedded memories (Flash memory up to 128 Kbytes and SRAM up to 20 Kbytes), and an extensive range of enhanced I/Os and peripherals

Leading-edge architecture with Cortex-M3 core

■ Harvard architecture ■ 1.25 DMIPS/MHz and 0.19 mW/MHz ■ Thumb-2 instruction set brings 32-bit performance with 16-bit code density ■ Single cycle multiply and hardware division ■ Embedded, fast interrupt controller is now inside the core allowing: ■ Excellent real-time behaviour ■ Low la

Low-density performance line, ARM-based 32-bit MCU with 16 or 32 KB Flash, USB, CAN, 6 timers, 2 ADCs, 6 com. interfaces

文件：1.16751 Mbytes Page：90 Pages

Low-density performance line, ARM-based 32-bit MCU with 16 or32 KB Flash, USB

文件：1.16751 Mbytes Page：90 Pages