64K SPI Bus Low-Power Serial SRAM

Description: The Microchip Technology Inc. 23X640 are 64 Kbit Serial SRAM devices. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device

64K SPI Bus Low-Power Serial SRAM

文件：563.43 Kbytes Page：28 Pages

64K SPI Bus Low-Power Serial SRAM

文件：608.84 Kbytes Page：28 Pages

封装/外壳：8-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC SRAM 64KBIT SPI 20MHZ 8SOIC 集成电路（IC） 存储器

64-Kbit SPI Bus Low-Power Serial SRAM

Features • Max. Clock 20 MHz • Low-Power CMOS Technology: - Read current: 3 mA at 1 MHz - Standby Current: 4 A Max. at +85°C • 8192 x 8-bit Organization • 32-Byte Page • HOLD pin • Flexible Operating modes: - Byte read and write - Page mode (32 Byte Page) - Sequential mode • Sequentia

64K SPI Bus Low-Power Serial SRAM

Description: The Microchip Technology Inc. 23X640 are 64 Kbit Serial SRAM devices. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device

64K SPI Bus Low-Power Serial SRAM

文件：563.43 Kbytes Page：28 Pages

64-Kbit SPI Bus Low-Power Serial SRAM

Features • Max. Clock 20 MHz • Low-Power CMOS Technology: - Read current: 3 mA at 1 MHz - Standby Current: 4 A Max. at +85°C • 8192 x 8-bit Organization • 32-Byte Page • HOLD pin • Flexible Operating modes: - Byte read and write - Page mode (32 Byte Page) - Sequential mode • Sequentia

64-Kbit SPI Bus Low-Power Serial SRAM

Features • Max. Clock 20 MHz • Low-Power CMOS Technology: - Read current: 3 mA at 1 MHz - Standby Current: 4 A Max. at +85°C • 8192 x 8-bit Organization • 32-Byte Page • HOLD pin • Flexible Operating modes: - Byte read and write - Page mode (32 Byte Page) - Sequential mode • Sequentia

64K SPI Bus Low-Power Serial SRAM

Description: The Microchip Technology Inc. 23X640 are 64 Kbit Serial SRAM devices. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device

64K SPI Bus Low-Power Serial SRAM

文件：563.43 Kbytes Page：28 Pages