CY7C148价格

参考价格:¥831.0149

型号:CY7C1480BV25-167AXC 品牌:Cynergy 3 备注:这里有CY7C148多少钱,2024年最近7天走势,今日出价,今日竞价,CY7C148批发/采购报价,CY7C148行情走势销售排行榜,CY7C148报价。
型号 功能描述 生产厂家&企业 LOGO 操作
CY7C148

1Kx4StaticRAM

FunctionalDescription TheCY7C148andCY7C149arehigh-performanceCMOSstaticRAMsorganizedas1024by4bits.EasymemoryexpansionisprovidedbyanactiveLOWchipselect(CS)inputandthree-stateoutputs.TheCY7C148remainsinalow-powermodeaslongasthedeviceremainsunselected;i.

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress
CY7C148

1Kx4StaticRAM

文件:224.18 Kbytes Page:9 Pages

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription TheCY7C1480BV25/CY7C1482BV25/CY7C1486BV25[1]SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-tr

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

Features ■Supportsbusoperationupto250MHz ■Availablespeedgradesare250,200,and167MHz ■Registeredinputsandoutputsforpipelinedoperation ■3.3Vcorepowersupply ■2.5V/3.3VI/Ooperation ■Fastclock-to-outputtimes ❐3.0ns(for250MHzdevice) ■P

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)PipelinedSyncSRAM

FunctionalDescription[1] TheCY7C1480V33/CY7C1482V33/CY7C1486V33SRAMintegrates2Mx36/4Mx18/1M×72SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-trigg

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

72-Mbit(2Mx36/4Mx18/1Mx72)Flow-ThroughSRAM

FunctionalDescription[1] TheCY7C1481V25/CY7C1483V25/CY7C1487V25isa2.5V,2Mx36/4Mx18/1Mx72SynchronousFlow-throughSRAMdesignedtointerfacewithhigh-speedmicroprocessorswithminimumgluelogic.Maximumaccessdelayfromclockriseis6.5ns(133-MHzversion).A2-biton-chipcount

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

Cypress

CY7C148产品属性

  • 类型

    描述

  • 型号

    CY7C148

  • 制造商

    Cypress Semiconductor

更新时间:2024-4-25 22:50:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
CY
23+
DIP
6500
全新原装假一赔十
CYPRESS/赛普拉斯
2020+
NA
80000
只做自己库存,全新原装进口正品假一赔百,可开13%增
CYPRESS
23+
DIP
6000
原装正品,支持实单
CYPRESS(赛普拉斯)
23+
BGA165
6000
Cypress
21+
100TQFP (14x20)
13880
公司只售原装,支持实单
CYPRESS
23+
DIP-18
3200
全新原装、诚信经营、公司现货销售!
CYPRESS
2018+
DIP
30617
主打CYPRESS品牌价格绝对优势
CYPRESS/赛普拉斯
21+
BGA
26484
一站式BOM配单
Cypress
22+
TQFP
5000
十年沉淀唯有原装
CYPRESS/赛普拉斯
24+
BGA
860000
明嘉莱只做原装正品现货

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